schematic rules!
General Guidelines
1. Make sure you follow your block diagram and your MCU pinout plan... it is your map in the fog of schematic war.
2. Try to always have your DC currents flow from top to bottom and your AC signals flow from left to right.
3. Use GND and supply nodes where ever possible... it makes things easier to read and review.
4. Do NOT cross wires unless it is absolutely necessary. If you need to get an SPI_MOSI pin from one side of the schematic to the other, name the node on the right side "SPI_MOSI" and name the node on the left side "SPI_MOSI" and now they are connected without having an actual wire run across the whole schematic.
5. Double check that your pin names match the pad/pin numbers in layout... (hint: your spreadsheet of all your chips will help).
6. Write notes! Label decoupling caps, radio frequency (RF) traces/ports, analog signals, etc.
7. Follow the recommended schematic from the data sheet (hint #2: its in your spreadsheet or at least it should be)
DC Power Guidelines
1. Everywhere you have a DC power pin enter a chip... add decoupling capacitors.
Decoupling capacitors remove noise from your DC power supply into your chip... if you bias your chip with a crappy, noisy DC supply... your output waveform will have the added noise. Large capacitors are not easy to fit on tiny integrated circuits, so it is up to the PCB designer (you!) to make sure you put a big capacitor close to the DC supply pin. If there are multiple DC input pins, you better put at least one for each input pin.
You may ask why does a capacitor from the DC supply to ground help reduce noise into an IC? The answer lies in the impedance of a capacitor as you may (hopefully) remember:
1. Make sure you follow your block diagram and your MCU pinout plan... it is your map in the fog of schematic war.
2. Try to always have your DC currents flow from top to bottom and your AC signals flow from left to right.
3. Use GND and supply nodes where ever possible... it makes things easier to read and review.
4. Do NOT cross wires unless it is absolutely necessary. If you need to get an SPI_MOSI pin from one side of the schematic to the other, name the node on the right side "SPI_MOSI" and name the node on the left side "SPI_MOSI" and now they are connected without having an actual wire run across the whole schematic.
5. Double check that your pin names match the pad/pin numbers in layout... (hint: your spreadsheet of all your chips will help).
6. Write notes! Label decoupling caps, radio frequency (RF) traces/ports, analog signals, etc.
7. Follow the recommended schematic from the data sheet (hint #2: its in your spreadsheet or at least it should be)
DC Power Guidelines
1. Everywhere you have a DC power pin enter a chip... add decoupling capacitors.
Decoupling capacitors remove noise from your DC power supply into your chip... if you bias your chip with a crappy, noisy DC supply... your output waveform will have the added noise. Large capacitors are not easy to fit on tiny integrated circuits, so it is up to the PCB designer (you!) to make sure you put a big capacitor close to the DC supply pin. If there are multiple DC input pins, you better put at least one for each input pin.
You may ask why does a capacitor from the DC supply to ground help reduce noise into an IC? The answer lies in the impedance of a capacitor as you may (hopefully) remember:
Z=1/(jwC)
where: Z=impedance, j=sqrt(-1), w=frequency (rad/s), and C=capacitance
At low frequencies such as 0 rad/s, the impedance is very high (1/0=open circuit) so the DC voltage does not see the capacitor at all. At high frequencies, the impedance is small (short circuit), so the AC noise gets shorted to ground. In fact, the larger the capacitor, the lower the cutoff frequency of the capacitor and the better it is at shorting out noise! For most chips, a 10 uF or 100 uF is the largest your decoupling caps will ever go
At low frequencies such as 0 rad/s, the impedance is very high (1/0=open circuit) so the DC voltage does not see the capacitor at all. At high frequencies, the impedance is small (short circuit), so the AC noise gets shorted to ground. In fact, the larger the capacitor, the lower the cutoff frequency of the capacitor and the better it is at shorting out noise! For most chips, a 10 uF or 100 uF is the largest your decoupling caps will ever go
2. (More of a layout rule) Power planes can help improve your DC power distribution
Many designers love to use power planes for their designs because they are low resistance distribution for a DC voltage and behave as a decoupling capacitor. A power plane is filling part of your board with copper all connected to a DC supply such as 5 V or 3.3 V. A power plane is low resistance because its width increases its cross-sectional area as shown below.
Many designers love to use power planes for their designs because they are low resistance distribution for a DC voltage and behave as a decoupling capacitor. A power plane is filling part of your board with copper all connected to a DC supply such as 5 V or 3.3 V. A power plane is low resistance because its width increases its cross-sectional area as shown below.
As for the decoupling capacitor behavior, it is slightly less obvious. Look at the side view above and recall the equation for a parallel plate capacitor (or cheat and look below).
C=εA/d
where: C=capacitance, ε =permittivity, A=area, and d=distance apart of two plates with a dielectric in-between. Hmmm.... the side view of the 5V power plane looks a lot like a parallel plate capacitor and by using the power plane, the area term is much higher than a single trace. Although this is more of an optional layout guideline, add a note on your schematic to remind yourself (or your layout guy/gal).
Grounding Guidelines
1. Ground everything to a single point
2. Connect your analog ground to your digital ground at a single point
1. Ground everything to a single point
2. Connect your analog ground to your digital ground at a single point